| 08:00 - 09:00 | Shangri-La Hotel, Beijing | | Registration |
| 09:00 - 09:20 | Garden Wing Ballroom | | Opening Speech [More Info]
Alex Wang, Synopsys China Deputy General Manager, Synopsys
Magic Ge, Synopsys
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| 09:20 - 10:00 | Garden Wing Ballroom | | Keynote Speech [More Info]
Deirdre Hanford, co-General Manager Design Group, Corporate Staff, Synopsys
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| 10:00 - 10:40 | Garden Wing Ballroom | | Keynote Speech [More Info]
Xiao Shanpeng, Deputy Director, Department of Wireless and Terminal Technology, China Mobile Research Institute
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| 11:00 - 12:00 | Pearl | | Accelerating Robust Custom Design [More Info]
Dr. Paul Lo, Senior Vice President, Design Group , Synopsys
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| 11:00 - 12:00 | Garden Wing Ballroom III | | Enabling Device Intelligence from the Data-Center to the Edge [More Info]
Stelios Diamantidis, Senior Product Marketing Manager, Synopsys
Dr. Joe Walston, Principal Applications Engineer, Synopsys
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| 11:00 - 12:00 | Garden Wing Ballroom I | | Next Generation Signoff Power and Reliability Analysis - Introduction and Tutorial [More Info] |
| 11:00 - 12:00 | Emerald | | Test Interaction with Functional Safety [More Info]
Adam Cron, Principal Applications Engineer, Synopsys
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| 11:00 - 12:00 | Garden Wing Ballroom II | | Transform Your RTL-to-GDSII Flow with Fusion Technology [More Info]
Mary Ann White, Director of Product Marketing, Galaxy Design Platform, Synopsys
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| 12:00 - 13:00 | Garden Wing Ballroom | | Networking Lunch |
| 13:00 - 13:40 | Pearl | | 7-nm Design Tips for Performance, Power & Area Optimization [More Info]
Ken Brock
Rahul Thukral
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| 13:00 - 13:40 | Emerald | | ADAS SW development and integration on a Virtual Prototype at NXP and 1st Tier [More Info]
Mingfei Bao, Senior Applications Engineer, Synopsys
Sylvain Bayon de Noyer, NXP
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| 13:00 - 13:40 | Garden Wing Ballroom III | | Bringing Digital Intelligence to the Design Platform [More Info]
Dr. Joe Walston, Principal Applications Engineer, Synopsys
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| 13:00 - 13:40 | Garden Wing Ballroom II | | Design and Verification Considerations for 5G Modem SoC [More Info]
Peter Zhang, R&D Manager, Synopsys
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| 13:00 - 13:40 | Garden Wing Ballroom I | | FastSpice – What’s New & The Application of Monte-Carlo in Mixed-Signal Simulation [More Info]
Eugene Lee, Senior Applications Engineer, Synopsys
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| 13:40 - 14:20 | Garden Wing Ballroom II | | Best Practices For High-performance, Energy Efficient Implementations of Arm® Next Generation Processors In 7-nanometer FinFET Compact (7FF) Process Technology Using Synopsys® Design Platform [More Info]
Felix Chen, Applications Engineer, Synopsys
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| 13:40 - 14:20 | Pearl | | Custom Compiler Template-Based Design for Layout Automation [More Info]
Jimmy Wu, Synopsys
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| 13:40 - 14:20 | Garden Wing Ballroom III | | How to Help AI Chip FPGA Prototyping with HAPS [More Info]
Guofu Chen, Synopsys
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| 13:40 - 14:20 | Garden Wing Ballroom I | | Software-Driven Power Analysis [More Info]
Keyuan Liu, ASR
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| 13:40 - 14:20 | Emerald | | What’s Required for Safety-Critical Semiconductor Designs? [More Info]
Mary Ann White, Director of Product Marketing, Galaxy Design Platform, Synopsys
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| 14:20 - 15:00 | Garden Wing Ballroom II | | 56G and 32G SerDes Enables Cloud Computing Applications with 100G/200G Ethernet and PCIe 5.0 [More Info] |
| 14:20 - 15:00 | Emerald | | Accelerating Automotive ADAS SoC Development with ASIL Certified IP [More Info]
Ron DiGiuseppe, Senior Product Marketing Manager, Synopsys
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| 14:20 - 15:00 | Pearl | | HSPICE, FSIM, Custom Compiler, Custom WaveView Updates and How to Accelerate SPICE for Analog Simulation [More Info]
Gim Tan, Senior Applications Engineer, Synopsys
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| 14:20 - 15:00 | Garden Wing Ballroom III | | PrimeTime ECO Tutorial – 5X Faster Power Recovery with Machine Learning [More Info]
James Chuang, Product Marketing Manager, Synopsys
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| 14:20 - 15:00 | Garden Wing Ballroom I | | What Advanced Node Support Means to Synthesis, What’s Changing and What it Promises to Deliver [More Info]
Carlos Abraham, Principal Applications Engineer, Synopsys
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| 15:20 - 16:00 | Emerald | | Automotive - Functional Safety Verification [More Info]
Peter Zhou, Synopsys
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| 15:20 - 16:00 | Garden Wing Ballroom II | | Emerging Node Design with IC Compiler II [More Info]
William Cheng, Senior Applications Engineer, Synopsys
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| 15:20 - 16:00 | Garden Wing Ballroom I | | Introduction to Reset Domain Crossings (RDC) [More Info]
Leon Yin, Senior Applications Engineer, Synopsys
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| 15:20 - 16:00 | Garden Wing Ballroom III | | Next Generation Memory Interfaces [More Info]
Brett Murdock, Senior Product Marketing Manager, Synopsys
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| 15:20 - 16:00 | Pearl | | Physically-Aware Simulation and Electrical Analysis During with Fusion Technology [More Info]
Hung-Shih Wang, Technical Marketing Manager, Synopsys
Ray Jier Liu, Senior Applications Engineer, Synopsys
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| 16:00 - 16:45 | Garden Wing Ballroom II | | Hector Use Model on computing algorithm verification [More Info]
Bob Bao, Synopsys
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| 16:00 - 16:45 | Pearl | | Industry Proven Solution to Achieve Fast Yield Ramp for New Products [More Info]
Chan Chen, Senior Applications Engineer, Synopsys
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| 16:00 - 16:45 | Emerald | | Memory Test & Repair and Hierarchical Test of Interface IP for Automotive FinFET based SoC’s [More Info]
Faisal Goriawalla, Senior Product Marketing Manager, Synopsys
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| 16:00 - 16:45 | Garden Wing Ballroom I | | Techniques to Accelerate Data Fusion in your SoC: High-Performance Sensor, Voice and Audio Processing [More Info]
Rick Wang, Mgr II, Applications Engineering, Synopsys
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| 16:00 - 16:45 | Garden Wing Ballroom III | | VC Formal Apps Expansion: X-Prop and Register Verification [More Info]
Xiaolin Chen, Senior Applications Engineer, Synopsys
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| 16:45 - 17:15 | Garden Wing Ballroom | | Lucky Draw [More Info] |
