| Wednesday 05/16/2018 | SNUG Boston 2018 |  |
| Thursday 05/31/2018 | SNUG Taiwan 2018 | |
| Monday 06/11/2018 | SNUG Europe 2018 | |
| Tuesday 05/22/2018 | FPGA and ASIC Verification for Aerospace and Defense Applications (MD) The overall complexity and size of ASIC and FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life. Security checking, DO-254 design assurance, UVM methodologies, low-power checking, formal property checking, verification intent specification and traceability, total coverage models and fault injection capabilities are methods that have become a requirement in today’s FPGA and ASIC Aerospace and Defense products. | |
| Thursday 06/07/2018 | FPGA and ASIC Verification for Aerospace and Defense Applications (ABQ) The overall complexity and size of ASIC and FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life. Security checking, DO-254 design assurance, UVM methodologies, low-power checking, formal property checking, verification intent specification and traceability, total coverage models and fault injection capabilities are methods that have become a requirement in today’s FPGA and ASIC Aerospace and Defense products. | |
| Thursday 05/24/2018 | Joint Arm - Synopsys Workshop We hope you will join us this at the Arm-Synopsys Workshop, Thursday, May 24, 2018. This free one-day event will feature the latest Arm CPU, Graphics, IoT, and Automotive Innovations, along with Synopsys Implementation and Verification tracks to meet your high-performance, energy efficient needs. | |
| Monday 06/04/2018 | SNUG Shanghai 2018 | |
| Wednesday 06/06/2018 | SNUG Beijing 2018 SNUG Beijing | |
| Tuesday 06/05/2018 | FPGA and ASIC Verification for Aerospace and Defense Applications (PHX) The overall complexity and size of ASIC and FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life. Security checking, DO-254 design assurance, UVM methodologies, low-power checking, formal property checking, verification intent specification and traceability, total coverage models and fault injection capabilities are methods that have become a requirement in today’s FPGA and ASIC Aerospace and Defense products. | |
| Tuesday 06/12/2018 | Functional Safety for Automotive Products - Workshop Functional Safety for Automotive Products - Workshop | |
| Wednesday 06/13/2018 | FPGA and ASIC Verification for Aerospace and Defense Applications (CO) The overall complexity and size of ASIC and FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life. Security checking, DO-254 design assurance, UVM methodologies, low-power checking, formal property checking, verification intent specification and traceability, total coverage models and fault injection capabilities are methods that have become a requirement in today’s FPGA and ASIC Aerospace and Defense products. | |
| Thursday 06/14/2018 | FPGA and ASIC Verification for Aerospace and Defense Applications (SLC) The overall complexity and size of ASIC and FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life. Security checking, DO-254 design assurance, UVM methodologies, low-power checking, formal property checking, verification intent specification and traceability, total coverage models and fault injection capabilities are methods that have become a requirement in today’s FPGA and ASIC Aerospace and Defense products. | |
| Monday 06/25/2018 | Synopsys Events at DAC 2018 - San Francisco Learn how Synopsys can help you develop innovative products from silicon to software at DAC June 24-28, Moscone West Convention Center, Booth 1609. | |
| Wednesday 10/24/2018 | SaberES Designer Seminar 2018 Learn how our customers and partners are using Saber to address their design challenges. Learn from Synopsys engineers how a new harness architecture solution, advanced modeling and automation, and electrical system design and verification technologies will help quickly deliver innovative new designs to the vehicle market place that meet or exceed the emerging new standards. | |
