| Wednesday 10/03/2018 | India VGTD 2018 |  |
| Tuesday 10/23/2018 | Synopsys TCAD Seminar 2018 - Taiwan Join our free TCAD Seminar to learn about the application of Synopsys TCAD solutions to accelerate the research, development and optimization of semiconductor technologies. Learn about the latest models and capabilities of the Sentaurus process, device, topography and interconnect simulation tools, the rapidly growing Process Explorer solutions for process integration, and the design-technology co-optimization (DTCO) solutions for advanced logic and memory technology development. | |
| Monday 10/29/2018 | Test SIG at ITC 2018 Join us for the Synopsys 26th Annual Test SIG event at ITC 2018. Appetizers and cocktails will be served, followed by a sit-down dinner, expert presentations and prize drawings. | |
| Tuesday 11/06/2018 | Arm-Synopsys Workshop 2018 - Israel Join us at the Arm-Synopsys Workshop on Tuesday, Nov. 6, 2018. This free one-day event will feature the latest Arm CPU, Graphics, IoT, and Automotive innovations, along with Synopsys Design and Verification tracks to meet your high-performance, energy-efficient needs. | |
| Tuesday 11/06/2018 | Arm-Synopsys Workshop 2018 - Israel Geofencing Join us at the Arm-Synopsys Workshop on Tuesday, Nov. 6, 2018. This free one-day event will feature the latest Arm CPU, Graphics, IoT, and Automotive innovations, along with Synopsys Design and Verification tracks to meet your high-performance, energy-efficient needs. | |
| Tuesday 11/13/2018 | Copenhagen Technology Symposium 2018 Technical Symposium focusing on critical aspects of doing state of the art designs at established and emerging nodes. | |
| Thursday 11/15/2018 | Trondheim Technology Symposium 2018 Technical Symposium focusing on critical aspects of doing state of the art designs at established and emerging nodes. | |
| Tuesday 11/20/2018 | Aerospace and Defense Verification Seminar - Israel The overall complexity and size of FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life. Security checking, DO-254 design assurance, UVM methodologies, low-power checking, formal property checking, verification intent specification and traceability, total coverage models and fault injection capabilities are methods that have become a requirement in today’s FPGA Aerospace and Defense products. | |
| Wednesday 01/30/2019 | SaberES Designer Seminar 2019 Learn how our customers and partners are using Saber to address their design challenges. Learn from Synopsys engineers how a new harness architecture solution, advanced modeling and automation, and electrical system design and verification technologies will help quickly deliver innovative new designs to the vehicle market place that meet or exceed the emerging new standards. | |
