| AMS | |||
| 12:00 pm - 12:45 pm | Typhoon | Efficient Monte Carlo Solution Custom Compiler™ Simulation Analysis Environment using HSPICE®, FineSim™ and CustomSim™; Alon Sasson - Synopsys [More Info] | |
| 12:45 pm - 1:15 pm | Typhoon | Using Custom Compiler’s Visually-Assisted Automation for Analog Layout; Uri Golan - Synopsys [More Info] | |
| 2:00 pm - 2:45 pm | Typhoon | Power Aware Simulation for Analog-Mixed Signal Design [More Info] | |
| 2:45 pm - 3:15 pm | Typhoon | Addressing Circuit Simulation Challenges in Advanced Node Designs Using CustomSim; David Shaya - Synopsys [More Info] | |
| Automotive | |||
| 2:00 pm - 2:45 pm | Pacific | Validating ISO.26262 Safety Tests with Synopsys Z01X; Itai Yarom, Frederico Pratas, Thomas Dedes, Andrew Webber - Imagination Technologies [More Info] | |
| 2:45 pm - 3:15 pm | Pacific | Meeting IP Requirements of ADAS Automotive SoCs; Ron DiGiuseppe - Synopsys [More Info] | |
| 3:45 pm - 4:15 pm | Pacific | New High Performance CPUs and DSPs from Synopsys to Enable Seamless Human-Machine Interfaces; Yankin Tanurhan - Synopsys [More Info] | |
| 4:15 pm - 5:00 pm | Pacific | Vision, Safety and Security: Critical Processing Elements for Autonomous Vehicles; Yankin Tanurhan - Synopsys [More Info] | |
| General Sessions | |||
| 8:30 am - 9:30 am | Alma Lobby Restaurant | Breakfast | |
| 8:30 am - 9:30 am | Lobby | Registration | |
| 9:30 am - 9:45 am | Aphrodite-Venus | Welcome [More Info] | |
| 9:45 am - 10:45 am | Aphrodite-Venus | Synopsys Keynote [More Info] | |
| 10:45 am - 11:30 am | Aphrodite-Venus | A Visionary Talk [More Info] | |
| 11:30 am - 12:00 pm | Alma Lobby Restaurant | Break | |
| 1:15 pm - 2:00 pm | Hemingway Restaurant and Garden | Networking Lunch | |
| 3:20 pm - 3:45 pm | Alma Lobby Restaurant | Break | |
| 5:00 pm - 6:00 pm | Venus | Best Paper Award and Prize Drawing | |
| Implementation I | |||
| 12:00 pm - 1:15 pm | Venus | R&D and User Panel: Achieving Best QoR on Advanced Designs with ICC II [More Info] | |
| 2:00 pm - 2:25 pm | Venus | Physical Implementation for HBM2-based 2.5D-IC Applications; Marco Casele-Rossi – Synopsys [More Info] | |
| 2:25 pm - 2:50 pm | Venus | HANOI Whiteboard Flow: the Seed for IC Compiler Implementation; Anna Fontanelli – Monozukuri [More Info] | |
| 2:50 pm - 3:15 pm | Venus | Case Study: Automatic Silicon Interposer Routing of HBM-based Applications; Uri Golan - Synopsys [More Info] | |
| 3:45 pm - 5:00 pm | Venus | Best Practices for High-Performance, Energy Efficient Implementations of the Latest ARM® Processors in 16nm FinFET Compact (16FFC) Process using Synopsys Galaxy™ Design Platform; Aditya Bedi - ARM, Joe Walston – Synopsys [More Info] | |
| Implementation II | |||
| 12:00 pm - 12:25 pm | Aphrodite Hall | Vision for Signoff and Design Closure; Jacob Avidan – Synopsys [More Info] | |
| 12:25 pm - 12:50 pm | Aphrodite Hall | The Ultimate Optimization Solution Based on Sign-Off Timing Tool ECO Capabilities [More Info] | |
| 12:50 pm - 1:15 pm | Aphrodite Hall | PrimeTime ECO Tutorial - Introducing Clock ECO; Jacob Avidan - Synopsys [More Info] | |
| 2:00 pm - 2:45 pm | Aphrodite Hall | RTL Synthesis: Today and the Vision into the Next Decade; Eyal Odiz - Synopsys [More Info] | |
| 2:45 pm - 3:15 pm | Aphrodite Hall | Practical Methods To Accelerate your RTL Synthesis [More Info] | |
| 3:45 pm - 4:15 pm | Aphrodite Hall | An Innovative and Efficient Approach for Building, Maintaining and using Complex Hierarchical UPF Files [More Info] | |
| 4:15 pm - 5:00 pm | Aphrodite Hall | Fast Timing Closer in Hierarchical Flow using Signoff Tool Hierarchical Flow Capabilities (context) [More Info] | |
| IP Summit | |||
| 12:00 pm - 1:15 pm | Pacific | DDR4 or HBM2 High Bandwidth Memory: How To Choose; Brett Murdock - Synopsys [More Info] | |
| 3:45 pm - 4:15 pm | Typhoon | Designing in PCI Express 4.0 and CCIX for Cache; Michael Chen - Synopsys [More Info] | |
| 4:15 pm - 5:00 pm | Typhoon | Optimizing Power, Performance and Area with 25G PHY IP; Prabhakar Bhanoori - Synopsys [More Info] | |
| Low Power | |||
| 12:00 pm - 12:45 pm | Atlantic | A Completely Cool Case Study – Synopsys Low Power Frontend Implementation/Verification; Godwin Maben - Synopsys [More Info] | |
| 12:45 pm - 1:15 pm | Atlantic | Power Estimation Methodology in Early Design Stages; Omri Margalit - Synopsys [More Info] | |
| Prototyping | |||
| 2:00 pm - 2:45 pm | Atlantic | Trapping the Hardest to Find Hardware Bugs in the Latest ARM Cores using FPGA-based HAPS Full Visibility Debug Technologies; Peter Gibbons - ARM [More Info] | |
| 2:45 pm - 3:15 pm | Atlantic | Partition Methodology for SOC Design [More Info] | |
| Software & Cyber Security | |||
| 9:30 am - 12:00 pm | Pacific | Managing and Enhancing your Static Analysis Capabilities with Coverity; Nelson Tam - Synopsys [More Info] | |
| 9:30 am - 12:00 pm | Typhoon | Managing Unknown Vulnerabilities: Finding and Eliminating 0-days. Interfaces; Rikke Kuipers - Synopsys [More Info] | |
| 9:30 am - 12:00 pm | Atlantic | Using Next Generation Technology (IAST) to Identify In-House Vulnerabilities and management of Open Source; Tamir Shavro, Jacob David - Synopsys [More Info] | |
| 12:00 pm - 12:50 pm | Hemingway Restaurant | Software & Cyber Lunch | |
| 12:50 pm - 1:40 pm | No location | Bits of Code: The Dawn of Cybersecurity Menny Barzilay, Cybersecurity Specialist | |
| 12:50 pm - 1:40 pm | Danieli Auditorium | Addressing Software Security at its Root Andreas Kuehlmann, SVP & GP, Software Integrity Group, Synopsys | |
| 2:05 pm - 2:30 pm | Danieli Auditorium | Fast & Furious – Managing 3rd Party Risks in Your Code; Jonathan Braverman | |
| 2:30 pm - 2:55 pm | Danieli Auditorium | Need for Speed – Rapid Development Security with DevSecOps; Ofer Maor - Synopsys | |
| 2:55 pm - 3:20 pm | Danieli Auditorium | Test Drive – Using Containers for Effective Security Testing; Omer Cohen - Cybersecurity Specialist | |
| 3:45 pm - 4:10 pm | Danieli Auditorium | Implementing Static Analysis into your CI – Customer Success Story; Imperva | |
| 4:10 pm - 4:35 pm | Danieli Auditorium | Continuous Automated Security Testing in your DevOps – Customer Success Story; Phoenix Insurance | |
| 4:35 pm - 5:00 pm | Danieli Auditorium | BSIMM: Measuring and Comparing ACTUAL Software Security to Reduce Risk; Stuart Dross, Sr. Director, Global Consulting & Managed Services | |
| Static Checks | |||
| 3:45 pm - 4:15 pm | Atlantic | Reset Domain Crossings; Igal Ze’evi - Synopsys [More Info] | |
| 4:15 pm - 5:00 pm | Atlantic | Accelerate RTL Design Closure with Lint Turbo for 3X Violation Reduction; Evgeny Poliakov- Synopsys [More Info] | |
| Verification Continuum | |||
| 12:00 pm - 12:45 pm | Poseidon | Accelerating Pre-Silicon Verification and Software Development for Complex SoC Applications; Susheel Tadikonda - Synopsys [More Info] | |
| 12:45 pm - 1:15 pm | Poseidon | Predicting SoC Performance and Power Using Task Graph Workload Models of Android Applications; Ohad Amarami - Synopsys [More Info] | |
| 2:00 pm - 2:25 pm | Poseidon | Performance Analysis using Platform Architect; Boris Shulman - Mobileye [More Info] | |
| 2:25 pm - 2:50 pm | Poseidon | VCS Performance Innovations – Fine-Grained Parallelism and More!; Bruce Green - Synopsys [More Info] | |
| 2:50 pm - 3:15 pm | Poseidon | Boosting Debug Productivity – Practical Applications of Verdi Debug Innovations; Yoram Granit - Synopsys [More Info] | |
| 3:45 pm - 4:10 pm | Poseidon | A Novel Approach to Multi-User 802.11ac/ax MAC-PHY; Eli Shteiner - Celeno [More Info] | |
| 4:10 pm - 4:35 pm | Poseidon | Using UVM Register Access Layer Hooks and Callbacks to Support Unconventional Register Structures [More Info] | |
| 4:35 pm - 5:00 pm | Poseidon | Simplifying Formal Verification using VC-Formal apps; Omri Margalit - Synopsys [More Info] | |
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